The present invention relates to memory systems, and more particularly, to signal termination in memory systems.
One conventional signal termination technique terminates a signal by connecting a termination resistor and a termination voltage to signal lines arranged on a system board. However, as the number of signal lines arranged on the system board increases, it may become difficult to arrange a termination circuit on the system board.
To solve the above problem, on-die-termination techniques have been developed. One conventional on-die-termination technique terminates a signal by arranging a termination circuit on an integrated circuit die, rather than on the system board. This can enhance arrangement of signal lines on the system board.
In one such conventional on-die-termination method in a conventional dual bank system, once a power supply voltage is applied to the system, an on-die-termination circuit is enabled to connect a termination voltage to data input/output (or input) pads, thereby terminating the signal. Although this method may be simple, it has the potential problem that the on-die-termination circuit is operated even when unneeded, that is, when data are not input to the system. Accordingly, an undesirable amount of energy may be dissipated through the on-die-termination circuit.
Generally, the number of the on-die-termination circuits in such a conventional system is the same as the number of data input/output (or input) pads. Accordingly, the more data input/output (or input) pads of the memory, the more on-die-termination circuits are needed, so the energy wasted by the on-die-termination circuits can become significantly large.